National Nanofab Center Ministry of Science and ICT KAIST

Intelligent Semiconductor Fusion and Composite Platform Technology

• The general structure of an intelligent semiconductor consists of a combination of a CMOS device that acts as a selector and an intelligent device.
• Due to this unique structural form, intelligent semiconductors are a representative fusion and combination technology that requires both CMOS technology provided by existing commercial Foundries and materials and device technologies that are not typically provided by commercial Foundries. Currently, it is only developed and provided in a limited manner by a few overseas Foundries and specific institutions, making it realistically difficult for domestic intelligent semiconductor technology users to use.
• The intelligent semiconductor fusion and combination platform technology to be provided by NNFC aims to support the construction of a verified public technology platform for intelligent semiconductors to ① support the development of original technologies for securing a huge technological gap in the poor domestic intelligent semiconductor ecosystem, ② perform the role of a testbed for technology verification, and ③ activate technology cooperation among industry, academia, research institutes, and government in the field of intelligent semiconductors.

• The intelligent semiconductor convergence and combination platform technology to be provided by NNFC is the first intelligent semiconductor-based platform support technology in domestic infrastructure institutions, which is a core base technology that can respond to various fields such as materials, devices, design, and systems.
• By Taking advantage of being an infrastructure institution int that it is easy to develop and apply specialized processes compared to commercial Foundries, and the introduction of new materials (limited to materials without cross-contamination problems) is relatively smooth, we plan to build and provide an intelligent semiconductor fusion and composite platform.

• The underlying CMOS technology of the Intelligent Semiconductor Convergence and Combination Platform actively utilizes the pre-established NNFC 180nm CMOS platform technology, enabling rapid construction and provision as an underlying selection device technology for intelligent semiconductors.
• The NNFC Intelligent Semiconductor Convergence and Combination Platform technology to be established can support from the unit device level to the array integration level.
• The developed array integration technology can be advanced to the module level connected with peripheral circuits, and the scalability of the technology that can connect between devices and design, and between design and modules is outstanding.

• We have established a platform that can support from the implementation of ideas to the production and verification of systems by preempting core process and material technologies and intellectual property rights of intelligent semiconductors.
• We have secured core design technologies including peripheral circuits of intelligent semiconductors to support technology demanders to develop technology efficiently.
• The developed convergence and combinatioin platform is planned to evaluate the suitability and completeness of the technology through technology verification sequentially from 2026. We will provide platform technology that has completed verification of technical suitability to verify whether it is suitable for the possibility of using technology in the development of intelligent semiconductors, and validation to verify whether the technical completeness is suitable for using technology up to the production of modules and systems.
• The convergence and combinatioin platform that has completed technology verification is planned to be provided to technology usuers sequentially from the 4Q of 2027.